Every early Williams game has them- colored lines or dashes at the top of the screen. They can usually be adjusted off the top of the screen, but when they are visible they are annoying. I've studied them a bit and I discovered that they happen when the color registers are written. All of the Williams games use color cycling extensively. Each game has a routine that runs during the vertical blanking interval (the time it takes the beam to go from the bottom of the screen back up to the top) that sets the color registers. Each access to those color registers causes a little glitch on the screen.
Here are a few pieces of evidence that helped me understand. When I pause the game, the lines disappear. That means they aren't being displayed out of the screen buffer, like the rest of the graphics are. Also, when I first added Defender to my multigame, I got lines like these but all over the screen when the game first came up until the logo appeared, and also during the diagnostics. I now know that was caused by my Joust CPU board interpreting writes to Defender's watchdog as setting color register 12. The watchdog was being cleared outside of the vertical blank interval, so the lines showed up whereever the screen was being drawn at that time. Also, during the Joust title screen, when the colored bars are chasing around the border, most of the "glitch" lines are the same color as the border. This effect is done with color cycling, using 8 registers. 7 are the main color and one is black. As black is cycled through those 8 registers, motion is perceived. Lastly, Two 7489 ICs are used for the color registers. Their outputs are connected directly to the RGB outputs, so whenever the registers are written to, the RGB outputs will be that color until the memory access is over.
Knowing how they are caused, it's time to try to fix them. The only way I can think of hiding them is to blank the screen while they are being displayed. The CPU board has some gates that turn a transistor on to blank the screen once every line for horizontal blanking and once every screen for vertical blanking. I first tried ORing in the 7489 write enable signal (inverted) with the original blanking signal. That way, when data was written to the color RAM, the output would be blanked. But that didn't seem to do much. I'm guessing that the amount of time that the signal is asserted is too small to hide the glitch. The write enable signal is made from several other signals, including *C0xx, which is low whenever there's access to that memory range. Since writing to the color registers should be the only access to that range, I ORed that signal with the original blanking signal and got much better results: the colored dashes are reduced to single pixels. I guess I'm seeing propagation delay- by the time the blanking circuit kicks in, a pixel has already been drawn.
That isn't a complete fix, so I tried another approach- delaying the time when vertical blanking is removed. The idea being that if I keep the screen blanked until after the glitches are displayed, they won't be seen. The original vertical blanking circuit looks at the video counters VA9 to VA13. All those are ANDed together and fed into a flip-flop that's clocked by VA6. What that means is that when VA9 to VA13 are all ones, vertical blanking will begin the next time VA6 toggles, and will end the next time VA6 toggles. I changed the flop-flop's clock from VA6 to VA7, which delayed both the beginning and ending of vertical blanking, but that wasn't enough. Then I used VA8, and that's nearly perfect. The only problem is that when there's a lot of blitting going on (the start of a Robotron wave, for example), the vertical blank interrupt service routine gets delayed a bit, causing the glitch to appear even lower.
So I combined the 2 hacks. I needed an OR gate and a couple of NOT gates for the first hack, but I figured out that that circuit is equivalent to one NAND gate and one NOT gate, and a NAND gate can be used as a NOT, so I could use a single 7400, with 2 gates left over. This allowed me to use those 2 gates as one AND gate, so I could AND VA7 and VA8 together, resulting in a slightly longer delay of vertical blanking. I've got a Rev C and a Rev D CPU board, both of which have an empty spot at 6D for a 14-pin IC. So I soldered in my 7400 and used 22 gauge point-to-point wiring on the back of the PCB. One trace has to be cut (VA6 to the flip-flop's clock input), but it is otherwise easily reversible. So far, it looks like it works well in every game on my multigame.
I recommend this simple hack first- cut the trace going to the 7474 IC at 6C, pin 11, and tie that pin to the 9316 IC (it's probably a 74161) at 5D, pin 12. If that's good enough for you, you're done. If you want more, you'll need to add a 7400. Connect 7400 pin 13 to IC 5D pin 13, and 7400 pin 12 to IC 5D pin 12. Then connect 7400 pin 11 to 7400 pins 10 and 9. Connect 7400 pin 8 to IC 5D, pin 11. Lastly, ground 7400 pins 1 and 4, since we aren't using those gates.
Again, if this is good enough, you are done. The final hack uses those 2 leftover gates in the 7400, so unground pins 1 and 4. Find resistor R18 on the CPU board. It is 470 ohms, right next to the video connector. You want to heat up the leg closest to the edge of the board with a soldering iron and pull it from the PCB, leaving the other leg connected. Solder a wire to the leg of the resistor you pulled, and connect that to 7400 pin 6. Connect 7400 pins 1 and 2 together and connect to IC 4B pin 11. Connect 7400 pin 3 to pin 4. Last, connect 7400 pin 5 to IC 4G pin 4.
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