Blitter Information


Defender, Stargate, Robotron, Joust, Bubbles, Sinistar and Splat all run on very similar hardware. The video display is a bitmap; each byte of RAM is displayed as two pixels. There are no sprites. That means a lot of data has to be moved around in memory while the game is playing. Defender and Stargate use just the CPU to move that data. It's a testimony to the 6809 and the programmers that a 1MHz CPU can do that.

The Williams games that came after Defender and Stargate were augmented with direct memory access hardware. Two integrated circuits (the Special Chips) were added to the ROM board. These chips can move blocks of memory from one place to another without using the CPU. Since they do block transfers, they are also known as blitters. When a program writes to registers on these chips, the CPU is halted and the chips take over the address and data busses, reading data from one memory location and writing it to another. Each Special Chip handles 4 bits, which is one pixel.

The CPU takes several 1 microsecond bus cycles to read a byte and write it somewhere else, while the Special Chips can copy a byte from anywhere in ROM to anywhere in RAM in one 1 microsecond. This order-of-magnitude speed increase is nice, but the Special Chips offer other functionality, as well:

  1. They can shift the source data right one pixel when writing it. This is extremely useful because every byte of RAM holds 2 pixels. To move a shape horizontally one pixel is too time-consuming for the CPU to do quickly, so Defender and Stargate had duplicate images of every shape, with the second copy shifted one pixel right. The Special Chips handle this task at the same speed as a regular copy. Since the duplicate graphics are no longer needed, a lot of ROM space is freed up for additional shapes or more complicated game programming.
  2. They have a mode where color 0 is not copied to the destination, allowing for transparency. When this mode is used, pixels that are color 0 in the source data remain untouched in the destination, allowing for non-rectangular shapes, or even shapes with "holes" in them where the background shows through.
  3. Instead of copying bytes from the source location, the blitters can be told to replace the destination pixels with a given color. Coupled with transparency, this is used to draw text, as well as in effects such as player materialization in Joust.
  4. Screen memory is setup such that successive bytes are displayed below one another; the next pair of pixels to the right of the previous are 256 bytes away in memory. This is an awkward format to store graphics in the game program, though; it's much easier to store them in memory one row after another. The Special Chips can take pixels stored sequentially and blit them to the screen in its format. (Another way of saying this is that the blitters can take source data with stride 1 and write to the destination with stride 256; actually, both source or destination can have either stride 1 or 256, independently.)
  5. RAM used for screen memory is being accessed half the time by the video hardware to display the graphics on the monitor. The blitters have to respect that, or else there is bus contention and data is scrambled. So blits from RAM to RAM have to run at half speed, 2 microseconds per byte. Blits from ROM to RAM, or from Sinistar's extra RAM to video RAM, can be done twice as fast.
  6. Either or both of the even and odd pixels can be suppressed from being blitted. I guess you could use this for special effects.

The basic operation of the blitters has been understood for some time from disassembling game code- there are 6 registers: address 0xCA00 is the control byte; writing it starts the blit. The value written to it determines the "flavor" of the blit: the source and destination stride, if the data is shifted, if a solid color is blitted instead of the source data, if transparency is used, etc. Address 0xCA01 is the solid color that can be substituted for the source data, 0xCA02-0xCA03 are the source address high and low bytes, 0xCA04-0xCA05 are the destination address high and low bytes, $CA06 is the width in bytes and $CA07 is the height in bytes. There is a bug in the Special Chips that requires bit 2 of the width and height to be inverted (XOR 4). The later version Special Chip 2, used in Splat and the more advanced games such as Blaster, Mystic Marathon, Joust 2, Turkey Shoot, etc seems to have the same functionality, but the width and height bug is fixed.

The core functionality of moving a block of data in memory is accomplished with 4 counters: one 16-bit counter for the source address, one for the destination address, one 8-bit counter for the width, and another for the height. The counters are preset to the values written to the registers. The CPU is halted, giving the Special Chips free access to the address and data busses. The source address is put on the address bus, and a read is initiated. That puts the value stored at that address on the data bus, which is read. Then the destination address is put on the address bus and the data byte on the data bus, and a write is initiated. The source and destination addresses are incremented. If the width is greater than zero, it is decremented and the process happens again. If the width is zero, the height is decremented. If the height is greater than zero than the width is reloaded with the initial value and the process happens again. Eventually the width and height are both decremented to zero and the blit is finished; the CPU is allowed to run again.

In older versions of MAME and in several xx-in-one boards, blits happen pretty much instantaneously, unlike the real games where the Special Chips have a maximum throughput of 1 MB/second (not counting the time it takes to write to the registers to start the blit). This results in games that appear normal at the beginning levels, but become much harder at the later levels. Robotron can have so many enemies on screen at once that all cannot be moved in one video frame. So the game moves as many as possible, then moves the rest in the next frame. With an "instantaneous blitter", all the enemies can be moved in one video frame, making the game play much faster. This is masked in the lower waves because time delays are added to make the game easier in the beginning, but the later waves are much harder than on a real game.

MAME fixed this one some time ago, making the emulation much better. But it did not implement SLOW mode for RAM-to-RAM transfers until recently, since its emulated hardware doesn't have that restriction. And without a schematic or even instructions as to how the Special Chips actually work, the details of many features were figured out by trial and error and lots of test play to see how the games were affected with each change. For instance, what happens if you specify a width or height of 0? Does anything change if you do a blit with both even and odd pixels suppressed? How exactly does shift work? What are the largest and smallest blits that you can do?

In order to better understand how the Special Chips work, I wrote a program in 6809 assembly language that performs a couple hundred blits with different parameters. I timed how long it took to do 1000 blits with each set of parameters, then dumped memory to a file to see exactly what the results of each blit were. Before each blit, the first 1/4 of RAM was cleared, the next 1/4 set to 0xFF, the next 1/4 to 0xA5, and the rest to 0x5A. I ran this program on two Joust machines, using 5 sets of Special Chips to see if there was any difference; there was not. I also ran this under MAME version 0148.

About 13% of the blits had different results in MAME than on the real game, and about 11% of the blits took a different amount of time in MAME than on the real game. I'm sure that these blits represent a very small proportion of blits done in actual game play, but they may still contribute to game play anomalies.

After making modifications to the MAME source code to make the results match, the blitter code is actually simpler than before; this makes sense, since the Special Chips are not programmed CPUs, but a collection of logic gates. That means that they probably don't have a lot of if-then exceptions that code would have, but use a more straight-forward approach.

This information may be useful to people creating multigames, either emulated with CPUs, or in hardware using FPGAs. Here is a table showing the blitter parameters that I tested, a CRC of memory after 1000 blits, and time it took per blit (in milliseconds). There are links to the test program source code and the memory dumps from an actual Joust machine for all the blits. The dump file consists of 16 bytes containing the parameters for the blit, then 49,152 bytes of RAM, repeated for all 256 blits. Note that the first entry in the table isn't actually a blit: I ran through the loop 1000 times, but instead of storing the control byte at $CA00 to start the blit each time, I executed NOPs. This gives baseline timing that can be subtracted from the times in the table to obtain the time spent doing the actual blit.

My program

Memory dumps

ROM/RAMsourcesoliddestWidth XOR 4Height XOR 4control bytedescriptionCRC1000 blit time1 blit timenumber bytesoffset in dump
       NO BLITD73B077C132.5040.132504000000000
1FCF53C000014140SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVEN690FDD04394.0780.3940782560000C010
1FCF53C0100240C0SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVENF8608075394.2810.39428125600018020
1FCF53C02004400SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVEN81E146CC393.6020.39360225600024030
1FCF53C03008460SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVEN15147A74392.7250.39272525600030040
1FCF53C04000C240SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVENB12C3E2D393.9620.3939622560003C050
1FCF53C05000440SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVENF8FAFF76393.3510.39335125600048060
1FCF53C06006840SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVEN06AE2B6A393.5260.39352625600054070
1FCF53C070014148SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN6E031BDF393.5480.39354825600060080
1FCF53C0800141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN91373632396.2560.3962562560006C090
1FCF53C0900141420SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE SHIFT ODD EVEN77812D32394.6790.394679256000780A0
1FCF53C0A00141440SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT NO ODD EVEN9365D17D392.6790.392679256000840B0
1FCF53C0B00141480SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD NO EVEN945AD8C6393.2010.393201256000900C0
1FCF53C0C001414B8SRC stride= 1 DEST stride= 1 FAST FORE ONLY SOLID SHIFT ODD NO EVENAB152FAA393.5490.3935492560009C0D0
1FCF53C0D00141478SRC stride= 1 DEST stride= 1 FAST FORE ONLY SOLID SHIFT NO ODD EVENF407B07F394.2070.394207256000A80E0
1FCF53C0E0014144SRC stride= 1 DEST stride= 1 SLOW FORE+BACK IMAGE NO SHIFT ODD EVEN401E9AF5648.9250.648925256000B40F0
1FCF53C0F00141488SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD NO EVEN2C3F6036394.2020.394202256000C0100
1FCF50E1000141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN962793FC394.1220.394122256000CC110
1FCF51C1100141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN5BDA760E394.1350.394135256000D8120
1FCF52A1200141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVENF52CEBCE393.780.39378256000E4130
1FCF5381300141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN3650A740392.6990.392699256000F0140
1FCF5461400141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVENC7850F1B392.5490.392549256000FC150
1FCF5541500141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN92F4DA6D392.8150.39281525600108160
1FCF5621600141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN50EFC536393.1790.39317925600114170
1FCF5701700141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN78418C46394.1840.39418425600120180
1FCF58F1800141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN0CD15C3C393.3020.3933022560012C190
1FCF59D1900141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN2BBF518B393.3340.393334256001381A0
1FCF5AB1A00141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN5EF7B078392.3010.392301256001441B0
1FCF5B91B00141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN182A2537394.230.39423256001501C0
1FCF5C71C00141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVENF2C6C200393.5180.3935182560015C1D0
1FCF5D51D00141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN8E185F17394.9790.394979256001681E0
1FCF5E31E00141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVENFF0F265E392.9480.392948256001741F0
1FCF5F11F00141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEND75C8A82392.2230.39222325600180200
1FCF53C2000448SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN339A490E138.9020.13890210018C210
1FCF53C2100458SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEND1DE7C73138.8120.138812100198220
1FCF53C2200468SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEND16DB2A1138.810.138812001A4230
1FCF53C2300478SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVENAA6990D1139.720.139723001B0240
1FCF53C2400548SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN4AEF6991137.2210.1372211001BC250
1FCF53C2500558SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVENC9989117139.6010.1396011001C8260
1FCF53C2600568SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVENCA48C091139.1620.1391622001D4270
1FCF53C2700578SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVENB40AB053140.890.140893001E0280
1FCF53C2800648SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVENFE44B313138.2630.1382632001EC290
1FCF53C2900658SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN62DC3073139.4010.1394012001F82A0
1FCF53C2A00668SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVENA14971D9141.4160.1414164002042B0
1FCF53C2B00678SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN635830B6143.3850.1433856002102C0
1FCF53C2C00748SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVENB489A0E6141.5480.14154830021C2D0
1FCF53C2D00758SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN658033C4141.1170.1411173002282E0
1FCF53C2E00768SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN59C85AFD144.0090.1440096002342F0
1FCF53C2F00778SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN7C3F4009146.8630.146863900240300
1FCF53C300014140SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVEND67E46C9394.9570.3949572560024C310
1FCF53C3100240C0SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVEN367A9E68394.6870.39468725600258320
1FCF53C32004400SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVEN089109F7395.2150.39521525600264330
1FCF53C33008460SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVEN41C7B6C4393.7050.39370525600270340
1FCF53C34000C240SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVENDC8808C1394.0410.3940412560027C350
1FCF53C35000440SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVEN17821CC3394.3350.39433525600288360
1FCF53C36006840SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVEN663B96C9394.0670.39406725600294370
1FCF53C370014148SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN71F90D23393.3080.393308256002A0380
1FCF53C3800141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN63D46EFD393.5210.393521256002AC390
1FCF53C3900141420SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE SHIFT ODD EVEN72CDA549394.2520.394252256002B83A0
1FCF53C3A00141440SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT NO ODD EVEN335A143A394.1490.394149256002C43B0
1FCF53C3B00141480SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD NO EVEN46A050E5393.6730.393673256002D03C0
1FCF53C3C001414B8SRC stride= 1 DEST stride= 1 FAST FORE ONLY SOLID SHIFT ODD NO EVEN3C032A30395.1520.395152256002DC3D0
1FCF53C3D00141478SRC stride= 1 DEST stride= 1 FAST FORE ONLY SOLID SHIFT NO ODD EVEN5BB4AEEE394.6290.394629256002E83E0
1FCF53C3E0014144SRC stride= 1 DEST stride= 1 SLOW FORE+BACK IMAGE NO SHIFT ODD EVENF3779234649.5950.649595256002F43F0
1FCF53C3F00141488SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD NO EVEND4D9E9A8394.3660.39436625600300400
1FCF50F4000141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN14815D8E394.0730.3940732560030C410
1FCF51D4100141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN01D1442A394.5640.39456425600318420
1FCF52B4200141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN7BA5E699393.4150.39341525600324430
1FCF5394300141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVENA9D482B5392.850.3928525600330440
1FCF5474400141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN27658D34393.8370.3938372560033C450
1FCF5554500141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVENB26F94BD393.4140.39341425600348460
1FCF5634600141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVENA9885469392.9030.39290325600354470
1FCF5714700141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVENBAF556E6393.1080.39310825600360480
1FCF58E4800141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN862FA195393.3240.3933242560036C490
1FCF59C4900141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN9452B436392.8920.392892256003784A0
1FCF5AA4A00141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN4A342076393.9010.393901256003844B0
1FCF5B84B00141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVENE49F923B393.6970.393697256003904C0
1FCF5C64C00141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEND2137A09393.3320.3933322560039C4D0
1FCF5D44D00141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN0055751B394.0820.394082256003A84E0
1FCF5E24E00141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN4151CB80394.2870.394287256003B44F0
1FCF5F04F00141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN42F3A55E393.5660.393566256003C0500
1FCF53C5000448SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEND1A3B2B9138.1080.1381081003CC510
1FCF53C5100458SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVENAE5A1119138.4420.1384421003D8520
1FCF53C5200468SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVENFFF2C0B1139.0130.1390132003E4530
1FCF53C5300478SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVENCC3D7A66141.080.141083003F0540
1FCF53C5400548SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN81302786139.3010.1393011003FC550
1FCF53C5500558SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN04EBC0A1139.130.13913100408560
1FCF53C5600568SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN4402B68C139.9680.139968200414570
1FCF53C5700578SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVENA9072344140.710.14071300420580
1FCF53C5800648SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN6B6315FC138.7120.13871220042C590
1FCF53C5900658SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN9D11767B139.3150.1393152004385A0
1FCF53C5A00668SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN22E553AD142.6160.1426164004445B0
1FCF53C5B00678SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN1FAECF66144.2140.1442146004505C0
1FCF53C5C00748SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVENA30E3B49139.3310.13933130045C5D0
1FCF53C5D00758SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN1749ADE9139.6010.1396013004685E0
1FCF53C5E00768SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN264A2762143.4950.1434956004745F0
1FCF53C5F00778SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEN0353E8A6146.9240.146924900480600
1FCF53C600014140SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVEN0C82B216392.7530.3927532560048C610
1FCF53C6100240C0SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVENCDC64091392.8090.39280925600498620
1FCF53C62004400SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVEN493776EF393.5460.393546256004A4630
1FCF53C63008460SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVEN0D2370BB393.5290.393529256004B0640
1FCF53C64000C240SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVEN131D87EE393.9310.393931256004BC650
1FCF53C65000440SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVEND87EEC6D393.2430.393243256004C8660
1FCF53C66006840SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD EVEN791B5E96394.0110.394011256004D4670
1FCF53C670014148SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD EVEND32C1704393.7530.393753256004E0680
1FCF53C6800141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVENC09DA879394.2130.394213256004EC690
1FCF53C6900141420SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE SHIFT ODD EVEN1DC703F8393.2320.393232256004F86A0
1FCF53C6A00141440SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT NO ODD EVEN493BDE4B395.9390.395939256005046B0
1FCF53C6B00141480SRC stride= 1 DEST stride= 1 FAST FORE+BACK IMAGE NO SHIFT ODD NO EVENB9719DEB393.1630.393163256005106C0
1FCF53C6C001414B8SRC stride= 1 DEST stride= 1 FAST FORE ONLY SOLID SHIFT ODD NO EVEN71735B9F393.2980.3932982560051C6D0
1FCF53C6D00141478SRC stride= 1 DEST stride= 1 FAST FORE ONLY SOLID SHIFT NO ODD EVEN05E77160393.1220.393122256005286E0
1FCF53C6E0014144SRC stride= 1 DEST stride= 1 SLOW FORE+BACK IMAGE NO SHIFT ODD EVEN38AEBA43647.940.64794256005346F0
1FCF53C6F00141488SRC stride= 1 DEST stride= 1 FAST FORE ONLY IMAGE NO SHIFT ODD NO EVEN3FE99BE5393.7530.39375325600540700
1FCF50F7000141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEND2E2338D393.4320.3934322560054C710
1FCF51E7100141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVENE4E10C00392.9390.39293925600558720
1FCF52D7200141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN4655227E394.2550.39425525600564730
1FCF53C7300141410SRC stride= 1 DEST stride= 1 FAST FORE+BACK SOLID NO SHIFT ODD EVEN551CEE28393.1250.39312525600570740
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A few things of note: using a width or height of 0 gives the same results as 1. Even if the odd and even pixels are suppressed, the destination will be changed if the mode is FOREGROUND ONLY. A SLOW blit of 255x255 bytes (which is larger than RAM so probably not useful) takes just very slightly less time than the watchdog timeout (255x255/500,000=0.1301 seconds versus 8/60=0.1333 seconds). A blit can write to $CA00, which will cause another blit, and can cause an infinite loop of blits, until the watchdog resets the game.

Here's a list of the Special Chip signals:

I decapped a Special Chip 1 and took photos of the die. It has 38 pads, whereas the chip has 40 pins. Looking at the die, I think that pins 15 and 24, +12V and one of the grounds, weren't connected to the die. I also now think that pin 5, connected to /HALT, is actually an input, and the /HALT signal is generated by the LOWER chip's pin 3.

Here is the modified MAME blitter code from src/mame/video/williams.c

//controlbyte (0xCA00) bit definitions
#define WMS_BLITTER_CONTROLBYTE_NO_EVEN 0x80
#define WMS_BLITTER_CONTROLBYTE_NO_ODD 0x40
#define WMS_BLITTER_CONTROLBYTE_SHIFT 0x20
#define WMS_BLITTER_CONTROLBYTE_SOLID 0x10
#define WMS_BLITTER_CONTROLBYTE_FOREGROUND_ONLY 0x08
#define WMS_BLITTER_CONTROLBYTE_SLOW 0x04					//2us blits instead of 1us
#define WMS_BLITTER_CONTROLBYTE_DST_STRIDE_256 0x02
#define WMS_BLITTER_CONTROLBYTE_SRC_STRIDE_256 0x01

WRITE8_MEMBER(williams_state::williams_blitter_w)
{
	int sstart, dstart, w, h, accesses;
	int estimated_clocks_at_4MHz;

	/* store the data */
	m_blitterram[offset] = data;

	/* only writes to location 0 trigger the blit */
	if (offset != 0)
		return;

	/* compute the starting locations */
	sstart = (m_blitterram[2] << 8) + m_blitterram[3];
	dstart = (m_blitterram[4] << 8) + m_blitterram[5];

	/* compute the width and height */
	w = m_blitterram[6] ^ m_blitter_xor;
	h = m_blitterram[7] ^ m_blitter_xor;

	/* adjust the width and height */
	if (w == 0) w = 1;
	if (h == 0) h = 1;

	/* do the actual blit */
	accesses = blitter_core(space, sstart, dstart, w, h, data);

	/* based on the number of memory accesses needed to do the blit, compute how long the blit will take */
	if(data & WMS_BLITTER_CONTROLBYTE_SLOW)
	{
		estimated_clocks_at_4MHz = 4 + 4 * (accesses + 2);
	}
	else
	{
		estimated_clocks_at_4MHz = 4 + 2 * (accesses + 3);
	}

	space.device().execute().adjust_icount(-((estimated_clocks_at_4MHz + 3) / 4));

	/* Log blits */
	logerror("%04X:Blit @ %3d : %02X%02X -> %02X%02X, %3dx%3d, mask=%02X, flags=%02X, icount=%d, win=%d\n",
			space.device().safe_pc(), machine().primary_screen->vpos(),
			m_blitterram[2], m_blitterram[3],
			m_blitterram[4], m_blitterram[5],
			m_blitterram[6], m_blitterram[7],
			m_blitterram[1], m_blitterram[0],
			((estimated_clocks_at_4MHz + 3) / 4), m_blitter_window_enable);
}


WRITE8_MEMBER(williams_state::williams2_blit_window_enable_w)
{
	m_blitter_window_enable = data & 0x01;
}


/*************************************
 *
 *  Blitter core
 *
 *************************************/

INLINE void blit_pixel(address_space &space, int dstaddr, int srcdata, int controlbyte)
{
	williams_state *state = space.machine().driver_data();

	/* always read from video RAM regardless of the bank setting */
	int curpix = (dstaddr < 0xc000) ? state->m_videoram[dstaddr] : space.read_byte(dstaddr);	//current pixel values at dest

	int solid = state->m_blitterram[1];
	unsigned char keepmask = 0xff;			//what part of original dst byte should be kept, based on NO_EVEN and NO_ODD flags

	//even pixel (D7-D4)
	if((controlbyte & WMS_BLITTER_CONTROLBYTE_FOREGROUND_ONLY) && !(srcdata & 0xf0))	//FG only and src even pixel=0
	{
		if(controlbyte & WMS_BLITTER_CONTROLBYTE_NO_EVEN)
			keepmask &= 0x0f;
	}
	else
	{
		if(!(controlbyte & WMS_BLITTER_CONTROLBYTE_NO_EVEN))
			keepmask &= 0x0f;
	}

	//odd pixel (D3-D0)
	if((controlbyte & WMS_BLITTER_CONTROLBYTE_FOREGROUND_ONLY) && !(srcdata & 0x0f))	//FG only and src odd pixel=0
	{
		if(controlbyte & WMS_BLITTER_CONTROLBYTE_NO_ODD)
			keepmask &= 0xf0;
	}
	else
	{
		if(!(controlbyte & WMS_BLITTER_CONTROLBYTE_NO_ODD))
			keepmask &= 0xf0;
	}		

	curpix &= keepmask;
	if(controlbyte & WMS_BLITTER_CONTROLBYTE_SOLID)
		curpix |= (solid & ~keepmask);
	else
		curpix |= (srcdata & ~keepmask);
	
/* if the window is enabled, only blit to videoram below the clipping address */
/* note that we have to allow blits to non-video RAM (e.g. tileram, Sinistar $DXXX SRAM) because those */
/* are not blocked by the window enable */
	if (!state->m_blitter_window_enable || dstaddr < state->m_blitter_clip_address || dstaddr >= 0xc000)
		space.write_byte(dstaddr, curpix);
}


static int blitter_core(address_space &space, int sstart, int dstart, int w, int h, int controlbyte)
{
	williams_state *state = space.machine().driver_data();
	int source, sxadv, syadv;
	int dest, dxadv, dyadv;
	int x, y;
	int accesses = 0;

	/* compute how much to advance in the x and y loops */
	sxadv = (controlbyte & WMS_BLITTER_CONTROLBYTE_SRC_STRIDE_256) ? 0x100 : 1;
	syadv = (controlbyte & WMS_BLITTER_CONTROLBYTE_SRC_STRIDE_256) ? 1 : w;
	dxadv = (controlbyte & WMS_BLITTER_CONTROLBYTE_DST_STRIDE_256) ? 0x100 : 1;
	dyadv = (controlbyte & WMS_BLITTER_CONTROLBYTE_DST_STRIDE_256) ? 1 : w;

	int pixdata=0;

	/* loop over the height */
	for (y = 0; y < h; y++)
	{
		source = sstart & 0xffff;
		dest = dstart & 0xffff;
			
		/* loop over the width */
		for (x = 0; x < w; x++) 
		{
			if (!(controlbyte & WMS_BLITTER_CONTROLBYTE_SHIFT))	//no shift
			{
				blit_pixel(space, dest, state->m_blitter_remap[space.read_byte(source)], controlbyte);
			}
			else
			{	//shift one pixel right
				pixdata = (pixdata << 8) | state->m_blitter_remap[space.read_byte(source)];
				blit_pixel(space, dest, (pixdata >> 4) & 0xff, controlbyte);
			}
			accesses += 2;

			/* advance src and dst pointers */
			source = (source + sxadv) & 0xffff;
			dest   = (dest + dxadv) & 0xffff;
		}

		/* note that PlayBall! indicates the X coordinate doesn't wrap */
		if (controlbyte & WMS_BLITTER_CONTROLBYTE_DST_STRIDE_256)
			dstart = (dstart & 0xff00) | ((dstart + dyadv) & 0xff);
		else
			dstart += dyadv;

		if (controlbyte & WMS_BLITTER_CONTROLBYTE_SRC_STRIDE_256)
			sstart = (sstart & 0xff00) | ((sstart + syadv) & 0xff);
		else
			sstart += syadv;
	}
	return accesses;
}

The actual hardware does not read the destination byte to implement transparency- it has a signal that inhibits writes to the upper and/or lower nibbles. Likewise, I'm guessing shifting isn't done in hardware with a 16-bit shift register like MAME does it. Of course the actual blitter is spread out over two identical Special Chips, one for the lower 4 bits and one for the upper. They must work simultaneously; if they worked sequentially, blits would take twice as long. I found that if the UPPER Special Chip is removed, blitting still occurs, although it is corrupted. If the LOWER one is removed then no blitting occurs. Looking at the UPPER chip with the LOWER one removed, the logic analyzer shows that writes to $CA00 do not cause the CPU to halt. With LOWER removed, if you pull pins 3 and 14 of out of the socket, ground 14 and connect 3 to pin 5, then it acts just like when UPPER is removed and LOWER is present. This means that LOWER is the master, and pins 3 and 14 tell the chips which is master.

After running these blits, I thought of some other cases, and ran another 222 blits, including many with overlapping source and destination addresses. My modified MAME code matched the results from both Joust machines, except for a few blits where I accidentally did RAM-to-RAM blits without the SLOW bit set. This caused the Special Chips and the video circuitry to fight each other to drive the address bus, so data was read from incorrect locations. The same blitter parameters sometimes resulted in slightly different results on the same machine, and always a little more different between the two different machines. It's probably not good for the Special Chips to do this!

I also ran some more test cases to answer specific questions:

Here are some pics from a logic analyzer capture of the following code:

	lda		#0xff
	sta		blitter_mask
	ldx		#palette1
	stx		blitter_source
	ldx		#color_registers
	stx		blitter_dest
	ldx		#0x0514		;1x16
	stx		blitter_w_h
	lda		#0x04		;slow
	sta		start_blitter

	ldx		#blitdata
	stx		blitter_source
	ldx		#0x2880
	stx		blitter_dest
	ldx		#0x1414		;16x16
	stx		blitter_w_h
	lda		#0x02
	sta		start_blitter

I captured 8 control signals and the lower 8 address bits. I didn't notice until later that the test clip on A4 had fallen off. After the write to $CA00 to start the blit, the Special Chips assert the CPU signal *HALT. After the current instruction ends, the CPU sets signals BA and BS high, which results in the game signal *BABS going low. After nearly one instruction cycle, the blit begins. When the blit is done, *HALT is de-asserted, and after nearly 2 instruction cycles, *BABS goes high and the CPU starts running again.

overview of both blits The top signal shows writes to the Special Chip registers.

close up of first blit 16 bytes in SLOW mode

close up of second blit 256 bytes at full speed

HALT timing diagram from 6809E datasheet. It's confusing (and I think incorrect). The MC6809-MC6809E 8-Bit Microprocessor Programming Manual says "When BA goes low, an additional dead cycle will elapse before the processor regains control of the buses." This matches what I see.

I also captured the Special Chip signals and A7-A0 at 16MHz using a Saleae Logic 16 while doing one of each blit in the same order as the table above. Here is the capture of the "upper" Special Chip, and here the capture of the "lower" one. You can download Saleae's Logic software to view the captures in detail.

I'd like to purchase some Special Chip 2s to test them as well. If you have some, please email me.

Thanks to Mike, I was loaned a couple of Special Chip 2s to test. Other than the height/width bit 2 inversion bug, they tested out identical to the SC1s. I would still like to purchase one or two to decap and compare in detail.

Special Chip 1s are labelled VL2001; some have paper labels glued over them that say "SPECIAL CHIP 1" or "SPEC CHIP 1". The ones I have are date-coded 8220, 8224 and 8250. The manufacturer name is shown as VTI or VLSI, which is VLSI Technology, Inc..

Special Chip 2s are labelled VL2001A, with VTI's logo. The part number being the same with just an A suffix seems to indicate that there were only slight changes, perhaps only the height/width bug fix.


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